Open AccessArticle
Metamodel based Optimization for Analog Integrated Circuits
1 Gheorghe Asachi Technical University of Iasi, 700360, Romania
2 Institute of Computer Science, Romanian Academy, Iasi Branch, Iasi, 700481, Romania
*whom correspondence should be addressed. E-mail: vgrosu@etti.tuiasi.ro
Received: 13 May 2026, Revised: 8 July 2026, Accepted: 10 July 2026, Published Online: 21 July 2026
(This article belongs to the Special Issue on SP8 (Special Issue on Digital and Engineering Transformations in Science and Technology (SI-DETST-26)) and the Section Electronic Engineering (EEE))
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APA Style
Grosu, V. , Patache, N. and David, E. (2026). Metamodel based Optimization for Analog Integrated Circuits. Journal of Engineering Research and Sciences, 5(7), 1–15. https://doi.org/10.55708/js0507001
Grosu, V. , Patache, N. and David, E. (2026). Metamodel based Optimization for Analog Integrated Circuits. Journal of Engineering Research and Sciences, 5(7), 1–15. https://doi.org/10.55708/js0507001
Chicago/Turabian Style
Vasile Grosu, Nicolae Patache and Emilian David. "Metamodel based Optimization for Analog Integrated Circuits." Journal of Engineering Research and Sciences 5, no. 7 (July 2026): 1–15. https://doi.org/10.55708/js0507001
Vasile Grosu, Nicolae Patache and Emilian David. "Metamodel based Optimization for Analog Integrated Circuits." Journal of Engineering Research and Sciences 5, no. 7 (July 2026): 1–15. https://doi.org/10.55708/js0507001
IEEE Style
V. Grosu, N. Patache and E. David, "Metamodel based Optimization for Analog Integrated Circuits," Journal of Engineering Research and Sciences, vol. 5, no. 7, pp. 1–15, Jul. 2026, doi: 10.55708/js0507001.
V. Grosu, N. Patache and E. David, "Metamodel based Optimization for Analog Integrated Circuits," Journal of Engineering Research and Sciences, vol. 5, no. 7, pp. 1–15, Jul. 2026, doi: 10.55708/js0507001.
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Abstract
In recent times, machine learning applications have become an important component of the analog integrated circuit development cycle. Several phases such as circuit sizing, optimization or pre-silicon verification have benefited from machine learning automation. For developing such machine learning models, a certain amount of training and testing samples needs to be acquired through circuit simulations. Depending on the circuit complexity this process can become very costly time-wise which can lead to a bottleneck in the development cycle. This article proposes a metamodel based optimization of circuit performances in which we develop a prior machine learning model that will be used as a placeholder for the simulation environment. The machine learning model is designed using adaptive sampling techniques which aim to reduce the number of sample points in the model while still having an overall good accuracy. When compared to traditional methods of sampling such as random and Latin hypercube sampling this method offers better models for either a given error or a set number of sample points. Afterwards, the proposed method for circuit optimization is tested on two use cases, a single-stage and a two-stage operational amplifier. In both cases we compared the metamodel based optimization with the classical approach and no significant differences were found.
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