A Review of Machine Learning Techniques for Analog Integrated Circuit Design and Optimization
Journal of Engineering Research and Sciences, Volume 5, Issue 9, Page # 15-34, 2026; DOI: 10.55708/js0509002
Keywords: analog circuit design, circuit sizing, topology optimization, Bayesian optimization, machine learning, neural networks, reinforcement learning, evolutionary algorithms, operational, amplifiers, oscillators, low dropout regulators
(This article belongs to the Section Electronic Engineering (EEE))
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Vasile, G. (2026). A Review of Machine Learning Techniques for Analog Integrated Circuit Design and Optimization. Journal of Engineering Research and Sciences, 5(9), 15–34. https://doi.org/10.55708/js0509002
Grosu Vasile. "A Review of Machine Learning Techniques for Analog Integrated Circuit Design and Optimization." Journal of Engineering Research and Sciences 5, no. 9 (September 2026): 15–34. https://doi.org/10.55708/js0509002
G. Vasile, "A Review of Machine Learning Techniques for Analog Integrated Circuit Design and Optimization," Journal of Engineering Research and Sciences, vol. 5, no. 9, pp. 15–34, Sep. 2026, doi: 10.55708/js0509002.
Analog electronic design automation has historically lagged behind its digital counterpart due to the complex, multi-dimensional design space and strict sensitivity to parasitic effects, process variations, and geometric constraints. A comprehensive review of the evolution, current state-of-the-art, and future trajectories of electronic design automation tools specifically tailored for analog integrated circuit design could serve as a foundational roadmap for researchers and tool developers working to bridge the automation gap between analog and digital integrated circuit design. The present article does a state-of-the-art review from three perspectives; in a first phase, a review of algorithms present in the electronic design automation field is performed, highlighting use frequency, strengths and limitations of the more popular algorithms. Afterwards, it categorizes and evaluates recent advancements across several design phases: circuit sizing and optimization, automated topology generation, circuit verification, and physical layout generation (placement and routing). Special emphasis is placed on the paradigm shift from traditional, heuristics-based optimization to modern machine learning and deep reinforcement learning techniques, which have drastically reduced computational overhead while maintaining high optimization accuracy. Furthermore, this article addresses advances from the perspective of application use cases, presenting the progress that has been achieved with different circuit use cases, such as operational amplifiers, low dropout regulators, or voltage references. Finally, this review highlights open research directions, emphasizing the need for standardized benchmarks and robust, artificial intelligence-driven frameworks capable of seamless integration into existing commercial design flows.
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